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[TRON] DSH 753 Capacitor discharge voltage measurement

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发表于 2012-11-8 17:00 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
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DSH 753) `6 l+ w# w) V  a% M0 j' K7 j

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Capacitor discharge voltage measurement
$ `9 S0 E0 H, v# Z
9.1.6 (IEC60065/2001) 6.10.3 (IEC61010-1/2001)& r# c, ~- W( [! W9 f
61010-1(ed.2) & 60065(ed.7)
) Z* ]- g$ z) L9 ~0 s

2 U' _/ ~, z0 `3 J6 \+ e6 mStandard(s): No. Year! o2 v- j! ~) k) v
IEC60065/2001
& W! ]7 ~: c' E; \' jIEC61010-1/2001% w" _- D. _+ e& w% l
DSH 0753
% f. ~3 P$ |- w- i1 j2009
9 f7 O& Q5 Y. ]+ A1 ~7 pCategory:
2 r  Z, u. w! Y6 u% a+ DTRON, MEAS! k( p/ G* y) t$ x
Subclause(s):
; U6 z) @# }% Z  Y" s1 C1 @2 ^9.1.6! B$ `2 T) L2 G
6.10.3% z, z/ B# Z: `& _% T+ q7 ~; g* U
Developed by:8 i/ Z- W. x4 H. p
WG4, ETF2, ETF3
" ~* E% r$ Y( OSubject:3 l1 r0 a, m9 I/ g- u2 z; ^0 m# b
Capacitor discharge
1 v( J& D% l6 |8 pvoltage measurement! h+ G4 ~/ D- U) @: ]
Key words:
7 W+ ^4 L9 u- |+ W0 k) C6 `- Plug discharge3 j% p' C* Z1 _# N# i& m* {; l9 Z
- Capacitor discharge2 H" d" Y0 d& A+ t
- Shock hazard
3 Y$ b2 s; U4 m+ ?) h" XApproved at the 47th CTL
' {0 T7 ]* X1 v8 M. @Plenary Meeting, year 2010% ]$ Z$ s4 S8 W! U
Question:$ @9 j; q. k. B2 `, L; {
The standards referenced include a test commonly referred to as a plug discharge or capacitor/ Z  V5 q; U% \8 Y) S2 k$ r8 M- y
discharge test that involves disconnecting the product under test from the mains and
. S9 o3 S1 c8 e9 k! B! m. {7 [) Emeasuring the residual voltage across a capacitor(s) at a specified time. The intent in each of; d+ T: t1 O. U+ B% f# s- g
the referenced standards is the same – measure the maximum voltage obtainable at the time0 [: W9 C3 N0 S7 \# @6 S" W5 g
specified.5 J  E. K: m$ K& T. N
(1) Each standard has a slightly different description of how the mains disconnect is made, but0 K0 i6 w% b" r0 L
the intent is to disconnect at the highest voltage possible in the AC power cycle. With the; Q* Q( g; s/ }$ j
advent of electronic voltage sensing switches, it is possible to disconnect at the peak voltage in! _. M" _1 @  o: Z/ D1 p
the AC cycle. Using this procedure seems to be within the intent of the standards and would9 M% M( ~5 n9 `+ _- K1 C: B
result in more consistent and repeatable results. Is it acceptable to perform the test this way?
- v1 i; E4 v6 r(2) Good laboratory practice dictates that the voltage should be measured with a high input: B' [5 z$ ^$ \' E# O1 a) J
impedance voltmeter. For this test, some standards require the use of a voltmeter with an input6 A: m2 |) o# ]- Y7 x6 f; q
resistance of 100 M 1 ± 5 M 1 in parallel with an input capacitance of 25 pF or less. For more
+ \% m7 v& c7 U) L$ G2 a9 Gconsistent and repeatable results should this type of meter always be used for this type of test?
" \, \4 ]& }& Y0 X0 {. r) k9 ADecision:3 R  {  g/ {& u# V
(1) Yes, this method should always be used for these tests within the CB Scheme.7 L$ Y3 l4 {: c6 R! e: g& H
(2) Yes, a meter with the stated input impedance should always be used for these tests within+ Y7 u( k( F3 k2 Z& x
the CB Scheme.
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