lele11 发表于 2009-8-6 14:52

对EN60745-1,28.1章节中爬电距离值可以减少的疑问

有没有人知道如下条款中说提到的电压梯度的峰值如何检测?有没有实例说明怎么将这个条款应用到线路板上呢?谢谢!

28.1
For conductive patterns on printed circuit boards, except at their edges, the values in the
table between parts of different potential may be reduced, as long as the peak value of the
voltage stress does not exceed:
– 150 V per mm with a minimum distance of 0,2 mm, if protected against the deposition of dirt;
– 100 V per mm with a minimum distance of 0,5 mm, if not protected against the deposition of
dirt.
When the limits mentioned above lead to higher values than those of the table, the values of
the table apply.
For peak voltages exceeding 50 V, the reduced creepage distances only apply if the Proof
Tracking Index (PTI) of the printed circuit board, measured as in Annex G, is greater than
175.
These distances may be reduced further, provided that the tool complies with the
requirements of Clause 18 when the distances are short-circuited in turn.

对印刷电路板上的导电图形,其边棱除外,只要电压梯度的峰值没有超过下述值,表中关于不同极性部件间的值可以减小.
    ——若是防尘物沉积的,为150V/mm,但最小距离为0.2mm.
    ——若不是防尘物沉积的,为100V/mm,但最小距离为0.5mm.
    对峰值电压超过150V的情况,只有印刷电路板的耐漏电起痕指数(PTI)按照附录G进行测量时超过175,减小的爬电距离规定才适用.
    只要当这些距离轮流短路时,器具符合19章的要求,这些距离可以进一步的减小.

vbyu1987 发表于 2009-8-6 21:33

英文看不懂的啊

lele11 发表于 2009-8-11 14:21

引用第1楼vbyu1987于2009-08-06 21:33发表的:
英文看不懂的啊
英文段落下面有中文段落啊!
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